1. Field of the Invention
The present invention relates to a method for controlling a programmable controller which allows a stepping operation to be performed on the basis of a single ladder block or sequential function program block having input and output steps related to each other in a sequence program.
2. Description of the Prior Art
FIG. 3 is a block diagram showing a programming unit 2 for use with a programmable controller 1 that employs a controlling process known in the art. Referring to FIG. 3, the programmable controller 1 is connected by a cable 10 to a programming unit 2 for writing programs for operating the programmable controller 1. A CPU 3 in the programming unit 2 is connected by a common bus 3 a to a keyboard 4, a display device 5, and a floppy disk drive 6. A memory unit comprising programming memory 7 for storing an intermediate language program which has been converted from a ladder language or sequential function program entered from the keyboard 4, system program memory 8 for storing a system program for achieving functions of the programming unit 2 in conjunction with the CPU 3, and a work area memory 9, used when converting the ladder language program into the intermediate language or sequential function program or vice versa, also are connected to the common bus 3a. A starting word number memory 9a is used to store a starting word number as the first word number of a ladder block or sequential function program block in a program written in the intermediate language and stored in the programming memory 7. A table 9b identifies a correspondence between each intermediate language step and the number of words in that step. Memory 9a and table 9b are provided in the work area memory 9. Finally, an interface circuit 11 is connected to the bus 3a in the programming unit 2 and also connects to the cable 10.
A CPU 12 in the programmable controller 1 also is connected to several units by a bus 3b. A memory unit comprising a sequence program memory 13 for storing sequence programs, a system program memory 14 for storing a conversion table for converting a sequence program into a language decodable and executable by the CPU 12 for achieving the desired functions of the programmable controller 1, and a work area memory 15 used by the system program, all connect to the bus 3b. Work area memory 15 includes a stop command word number memory 15a, wherein a stop command word number is stored. The word number specifies the step at which the sequence program stops temporarily, as set by the programming unit 2 in a loop-specified step run described later. Work area memory 15 also includes a loop count memory 15b wherein a loop count, i.e., the number of times the sequence program is executed repeatedly, is set by the programming unit 2 in the loop-specified step run. As described later, the loop count is decremented by 1 every time the sequence program is executed. A stop word number memory 15c for storing a stop word number, i.e., a word number at which the sequence program has stopped temporarily, also is in memory 15 and is used in a single instruction execution stop step run described later. A single instruction execution stop flag memory 15d stores a single instruction execution stop flag that is set by the programming unit 2 when the single instruction execution stop step run is performed and is reset when a temporary stop state is restored in the single instruction execution stop step run described later. A single instruction execution stop words memory 15e stores the number of single instruction execution stop words, i.e., the number of words to be executed, and is set by the programming unit 2 in the single instruction execution stop step run later described. An interface circuit 16 exists between the bus 3b of the programmable controller and the cable 10. Finally, an input/output interface circuit 17 exists between an object to be controlled by the programmable controller (not illustrated) and the bus 3b of the programmable controller 1. A mode select switch 18 is operative to specify either of an ordinary run and a step run, and is particularly useful in selecting a desired run for debugging a sequence program.
In operation, the programmable controller 1 shown in FIG. 3 is designed to cause the sequence program written in an intermediate language stored in the sequence block memory 13 provided in the programmable controller 1 to be read sequentially and executed repeatedly from the first step to the last step. The sequence program is converted into a language processable by the CPU 12, via the system program stored in the system program memory 14, and is executed by the CPU 12.
FIG. 4 lists a relationship between representations of a short sample sequence program, as written in the ladder language and in the intermediate language. In FIG. 4, each arrow in a "Block" column 402 indicates a range of one "ladder block" and the three arrows in that column indicate that the program example in FIG. 4 is comprised of three ladder blocks. Each arrow in a "Step" column 403 indicates a range of "one step" and the ten arrows in that column indicates that the program example in FIG. 4 has a total of ten steps. A "Number Of Words" column 405 contains the number of words required for each intermediate language step, and an "Input/Output Instruction" column 406 indicates that each intermediate language step is an input instruction, if an input step, or is an output instruction, if an output step.
In the program example shown in FIG. 4, the total number of intermediate steps is 10 as described above and the total number of words is 23, as written in the "Number Of Words" column 405. The sequence program memory 13 or the programming memory 7 allows information to be transferred on a word-by-word basis and a word number is provided in the order that each memory area, which can store one word, is accessed.
As shown in column 406 of FIG. 4, a ladder block consists of at least one input instruction and one output instruction. Accordingly, a change from an output instruction to an input instruction occurs at a point where the sequence program shifts from one ladder block to the next.
During debugging of the sequence program it may be necessary to check an operating state of the programmable controller 1 while it is executing a specific step in the sequence program. In that case, the operation of the sequence program is checked by displaying the state of the programmable controller 1 in a "stop step" on the display device 5. The stop step may be conducted after carrying out, via the programming unit 2, a "single instruction execution stop step run". The single instruction run can display the state of the programmable controller 1 at each step while simultaneously advancing the sequence program written in the intermediate language. Alternatively, the stop step check and display may be conducted after executing, via the programming unit 2, a "loop-specified stop step run". The loop-specified run can specify a stop step and the number of times the sequence program is run until a stop is effected at the stop step.
FIG. 5 is an operation flowchart for the programmable controller 1 in conducting both a "single instruction execution stop step run", wherein a temporary stop is effected every time one word of the sequence program is executed in the intermediate language, and a "loop-specified stop step run". In FIG. 5, the sequence program is started and a check of the START condition is made at step S500. If there is a START (YES path), the operation advances to the next step S501 to zero the contents of the stop command word number memory 15a, the loop count memory 15b, the stop word number memory 15c, the single instruction execution stop flag memory 15d and the single instruction execution stop words memory 15e, all of which are provided in the work area memory 15 and employed at later steps in the operation. If the sequence program is not in a START condition (NO path) at the step S500, the operation progresses from the step S500 to step S502. There the condition of the mode select switch 18 is determined.
If at step S502 it is determined that the mode select switch 18 is in an "Ordinary Run" mode position, the operation moves on to step S503 to perform the ordinary run. If the mode select switch 18 is in a "Step Run" mode position, indicating that a debug of the program is to occur, the operation advances to the next step S504 where a determination is made as to whether the loop count is equal to 0.
If the loop count is not zero (NO path) at step S504, it is assumed that the "loop-specified stop step run" has been commanded by the programming unit 2 and the "loop-specified stop step run" operation indicated at steps S505 through S509 is performed. This process accomplishes a debugging on a loop basis. At step S505, the sequence program is executed beginning at the stop word number stored in the stop word number memory 15c and ending at the stop command word number stored in memory 15a, both being sent from the programming unit 2. On completion of the specified program execution, the operation then proceeds to the next step S506.
At the step S506, the loop count stored in the loop count memory 15b is decremented by 1 and the result is rewritten into the loop count memory 15b. The operation then proceeds to the next step S507 where a determination is made of whether the loop count is zero.
If the loop count then stored in the loop count memory 15b is not zero at step S507, the operation returns again to the step S506 via the step S509. At step S509, the sequence program is executed once, starting with the stop word number in memory 15c, and is stopped at the stop command word number stored in memory 15a, both being sent from the programming unit 2.
If the loop count is zero at step S507, the sequence program is assumed to have been executed the predetermined number of times, and the operation advances to step S508. At step S508, the word number at which the sequence program has stopped is written into the stop word number memory 15c and the operation returns to step S502. The operation would then proceed from step S502 to step S504. Since the loop count is zero, the YES path at step S504 is followed to step S510. At step S510, a determination is made of whether the single instruction stop command flag in memory 15d is set. When a loop mode had been prescribed, the flag would not be set.
If at step S510 it is determined that the single instruction execution stop command flag stored in the single instruction execution stop command flag memory 15d has not been set by the programming unit 2, the operation returns to the step S502 and repeatedly executes a loop comprised of the steps S502, S504 and S510 until coming to a temporary stop. When the single instruction execution stop command flag stored in the single instruction execution stop command flag memory 15d is set by the programming unit 2, the operation progresses from the step S510 to step S511 and executes the single instruction execution stop step operation. This would effect a line-by-line debugging operation. At step S511, before the single instruction execution stop command flag in memory 15d is set by the programming unit 2, the sequence program is executed by the number of single instruction execution stop words set in the single instruction execution stop words memory 15e and then comes to a stop. At step S512, the word number at which the sequence program has stopped is written into the stop word number memory 15c, and the operation moves on to the next step S513. At step S513, the single instruction execution stop command flag set in the single instruction execution stop flag memory 15d is reset and the operation returns to step S502. The loop comprised of steps S502, S504 and S510 is then repeatedly executed until coming to a temporary stop.
The corresponding operation of the programming unit 2 during the "single instruction execution stop step run" or the "loop-specified stop step run" will now be described with reference to flowcharts shown in FIGS. 6 to 8.
At step S601 shown in FIG. 6, the programming unit 2 is in a state of waiting for an input from keyboard 4, including a run-type command and related word number, loop count etc. When an operator enters a "single instruction execution stop step run" command, the operation progresses to step S602, where a determination is made as to whether the entered command is for a single instruction stop step run. If it is, the YES path is followed and the operation proceeds to step S605, where the single instruction execution stop step run operation of the programming unit 2, as shown in FIG. 7, is performed. Upon completion of that operation, the programming unit 2 returns to the state of waiting for a keyboard input at step S601.
The single instruction execution stop step run operation of the programming unit 2 at the step S605 may be described with reference to the flowchart in FIG. 7. Initially, a check of the START condition is made at step S701. If it is determined that the sequence program is started, the YES path is followed. The operation advances to the next step S702, wherein the starting word number memory 9a provided in the work area memory 9 of the programming unit 2 is cleared and the starting step number stored therein is zeroed. At the same time, the stop word number stored in the stop word number memory 15c provided in the work area memory 15 of the programmable controller 1 is zeroed. The operation then proceeds to step S703.
If it is determined that the sequence program is not started at step S701, the NO path is followed and the operation progresses from step S701 to step S703.
At step S703, the number of words required by an instruction at the next step in the sequence program written in the intermediate language is obtained. The intermediate language instruction/number of words correspondence table 9b, which lists all instructions written in the intermediate language and the number of words required for each instruction in the intermediate language, provides this number.
At step S704, the number of words obtained at step S703 is transferred as the number of single instruction execution stop words to the single instruction execution stop words memory 15e, provided in memory 15 of the programmable controller 1.
At step S705, the single instruction execution stop command flag stored in the single instruction execution stop command flag memory 15d provided in the programmable controller 1 is set. As previously discussed, when it is determined that the single instruction execution stop command flag has already been set at the step S510 shown in FIG. 5, the programmable controller 1 branches to the step S511 and performs the single instruction execution stop step run.
At step S706, the result of adding the number of words obtained at step S703 to the starting word number stored in the starting word number memory 9a is written to the starting word number memory 9a as an updated starting word number to prepare for the next step run.
At step S707, a state of the single instruction execution stop command flag stored in the single instruction execution stop command flag memory 15d of the programmable controller 1 is read. At step S708, if the single instruction execution stop command flag has not been reset, it is assumed that the single instruction execution stop step run has not yet been terminated and the operation returns to the step S707. If it is determined that the single instruction execution stop command flag has been reset at step S708, it is assumed that the programmable controller 1 has terminated the single instruction execution stop step run and the YES path is followed to an END step S709.
At the END step, the operation of step S605 in FIG. 6 will terminate and the operation returns to step S601, where the programming unit 2 again waits for a keyboard 4 input. The steps S707 and S708 are provided to synchronize the operation of the programming unit 2 with that of the programmable controller 1. The single instruction execution stop step run operation of the programmable controller 1 is performed at the steps S511 to S513 shown in FIG. 5.
Operation of the loop-specified stop step run will now be described. When the loop-specified stop step run accompanied by the entry of the stop command word number and the loop count is specified at the step S601 in FIG. 6, i.e., the run instruction is not for a single instruction run, the operation progresses along the NO path from the step S602 to the step S603 and further executes the step S604.
The loop-specified stop step run at the step S604 may be described with reference to the flowchart shown in FIG. 8. In FIG. 8, a determination is made as to whether the sequence program is started at step S801. If started, the operation advances to the next step S802, wherein the stop word number stored in the stop word number memory 15c provided in the programmable controller 1 is zeroed, and the operation proceeds to step S803. If the sequence program is not started at step S801, then the operation progresses from step S801 to the step S803.
At step S803, the stop command word number already entered at the step S601 of FIG. 6 is transferred to the stop command word number memory 15a of the programmable controller 1.
At step S804, the loop count already entered at the step S601 shown in FIG. 6 is transferred to the loop count memory 15b of the programmable controller 1. If the loop count set in the loop count memory 15b of the programmable controller 1 is not zero, the operation branches to the step S505 at the step S504 shown in FIG. 5 and performs the loop-specified stop step run operation.
At step S805, the loop count stored in the loop count memory 15b of the programmable controller 1 is read, and if the loop count is not zero at step S806, the operation returns again to the step S805. If the loop count is zero at the step S806, it is assumed that the loop-specified stop step run is complete in the programmable controller 1 and the operation terminates the step S604 of FIG. 6, returns to the step S601, and the programming unit 2 waits for another keyboard input. The steps S805 and S806 are provided to synchronize the programmable controller 1 and the programming unit 2. The loop-specified stop step run operation of the programmable controller 1 is performed at the steps S505 to S509 shown in FIG. 5.
A conventional operation for debugging the sequence program will now be described.
Since the sequence program provides an output condition in correspondence with an input condition in each block, it is not always useful to determine the operating state of the programmable controller 1 at steps into which the blocks have been subdivided. Therefore, the sequence program is best debugged by repeating the single instruction execution stop step run until the run progresses to a step delimiting one block, or by performing the loop-specified stop step run which is accompanied by the entry of the stop command word number and the loop count. To obtain the stop command word number required for the loop-specified stop step run, it is necessary to show the sequence program on the display or output it on a printer. Hence, the debugging operation is troublesome for a per block run.
The conventional controlling method has only the above described single instruction execution stop step run and loop-specified stop step run as step run modes. When performing a step run on the basis of a single block, which includes input and output instructions related to each other, it is necessary to repeat the single instruction execution stop step run or carry out the loop-specified stop step run. This requires the entry of the loop count and the calculation and entry of the stop word number. This poses problems such as operator error in the required calculation and key operations, and presents a practical difficulty in efficiently debugging the sequence program.